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1.
  • Haghbayan, M. -H, et al. (författare)
  • MapPro : Proactive runtime mapping for dynamic workloads by quantifying ripple effect of applications on networks-on-chip
  • 2015
  • Ingår i: Proceedings - 2015 9th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2015. - New York, NY, USA : Association for Computing Machinery (ACM). - 9781450333962
  • Konferensbidrag (refereegranskat)abstract
    • Increasing dynamic workloads running on NoC-based many-core systems necessitates efficient runtime mapping strategies. With an unpredictable nature of application profiles, selecting a rational region to map an incoming application is an NP-hard problem in view of minimizing congestion and maximizing performance. In this paper, we propose a proactive region selection strategy which prioritizes nodes that offer lower congestion and dispersion. Our proposed strategy, MapPro, quantitatively represents the propagated impact of spatial availability and dispersion on the network with every new mapped application. This allows us to identify a suitable region to accommodate an incoming application that results in minimal congestion and dispersion. We cluster the network into squares of different radii to suit applications of different sizes and proactively select a suitable square for a new application, eliminating the overhead caused with typical reactive mapping approaches. We evaluated our proposed strategy over different traffic patterns and observed gains of up to 41% in energy efficiency, 28% in congestion and 21% dispersion when compared to the state-of-the-art region selection methods. Copyright 2015 ACM.
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  • Rahmani, Amir-Mohammad, et al. (författare)
  • Dynamic Power Management for Many-Core Platforms in the Dark Silicon Era : A Multi-Objective Control Approach
  • 2015
  • Ingår i: Low Power Electronics and Design (ISLPED), 2015 IEEE/ACM International Symposium on. - : IEEE conference proceedings. - 9781467380089 ; , s. 219-224
  • Konferensbidrag (refereegranskat)abstract
    • Power management of NoC-based many-core systems with runtime application mapping becomes more challenging in the dark silicon era. It necessitates a multi-objective control approach to consider an upper limit on total power consumption, dynamic behaviour of workloads, processing elements utilization, per-core power consumption, and load on network-on-chip. In this paper, we propose a multi-objective dynamic power management method that simultaneously considers all of these parameters. Fine-grained voltage and frequency scaling, including near-threshold operation, and per-core power gating are utilized to optimize the performance. In addition, a disturbance rejecter is designed that proactively scales down activity in running applications when a new application commences execution, to prevent sharp power budget violations. Simulations of dynamic workloads and mixed time-critical application profiles show that our method is effective in honoring the power budget while considerably boosting the system throughput and reducing power budget violation, compared to the state-of-the-art power management policies.
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  • Naeem, Abdul, et al. (författare)
  • Architecture Support and Comparison of Three Memory Consistency Models in NoC based Syst
  • 2012
  • Ingår i: Proceedings of 15th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools (DSD 2012). - : IEEE Computer Society. - 9780769547985 ; , s. 304-311
  • Konferensbidrag (refereegranskat)abstract
    • We propose a novel hardware support for three relaxed memory models, Release Consistency (RC), Partial Store Ordering (PSO) and Total Store Ordering (TSO) in Network-on-Chip (NoC) based distributed shared memory multicore systems. The RC model is realized by using a Transaction Counter and an Address Stack based approach while the PSO and TSO models are realized by using a Write Transaction Counter and a Write Address Stack based approach. In the experiments, we use a configurable platform based on a 2D mesh NoC using deflection routing policy. The results show that under synthetic workloads, the average execution time for the RC, PSO and TSO models in 8x8 network (64 cores) is reduced by 35.8%, 22.7% and 16.5% respectively, over the Sequential Consistency (SC) model. The average speedup for the RC, PSO and TSO models in the 8x8 network under different application workloads is increased by 34.3%, 10.6% and 8.9%, respectively, over the SC model. The area cost for the TSO, PSO and RC models is increased by less than 2% over the SC model at the interface to the processor.
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  • Al-Khatib, Iyad, et al. (författare)
  • A Multiprocessor System-on-Chip for Real-Time Biomedical Monitoring and Analysis : Architectural Design Space Exploration
  • 2006
  • Ingår i: DAC '06. - New York, New York, USA : ACM Press. ; , s. 125-130
  • Konferensbidrag (refereegranskat)abstract
    • In this paper we focus on MPSoC architectures for human heart ECGreal-time monitoring and analysis. This is a very relevant bio-medicalapplication, with a huge potential market, hence it is an ideal targetfor an application-specific SoC implementation. We investigate asymmetric multi-processor architecture based on STMicroelectronicsVLIW DSPs that process in real-time 12-lead ECG signals. Thisarchitecture improves upon state-of-the-art SoC designs for ECGanalysis in its ability to analyze the full 12 leads in real-time, evenwith high sampling frequencies, and ability to detect heartmalfunction. We explore the design space by considering a number ofhardware and software architectural options.
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9.
  • Al Khatib, Iyad, et al. (författare)
  • ECG-BIONET : A global biomedical network for human heart monitoring and analysis: Performance needs of an electrocardiogram Telemedicine platform for medical aid at the point-of-need
  • 2006
  • Ingår i: 25TH IEEE INTERNATIONAL CONFERENCE ON COMPUTER COMMUNICATIONS. - New York : IEEE. - 9781424402212 ; , s. 3282-3283
  • Konferensbidrag (refereegranskat)abstract
    • In this paper, we propose a Tele-medicine application platform as a medical aid for patients suffering from Heart malfunction. We focus on heart diseases since they remain by far the major cause of death in the globe. Our solution utilizes the Satellite communication protocol DVB-RCS (Digital Video Broadcast- Return Channel Satellite), Wi-Fi, and the Network-on-Chip (NoC) technology. We utilize the 12-lead ECG biomedical technique to detect heart disorders via the biomedical NoC, which transmits the medical alarm and results via the biomedical network, ECG-BIONET. We do not investigate the DVB-RCS standard or Wi-Fi technology, but rather we try to utilize this technology, and we look at it from a performance point of view for our application by investigating three parameters, namely: delay, packet loss, and reliability. We follow a top down approach by looking at the needs of the application from a performance guarantee for our specific-purpose network.
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10.
  • Al-Khatib, Iyad, et al. (författare)
  • Performance Analysis and Design Space Exploration for High-End Biomedical Applications : Challenges and Solutions
  • 2007
  • Ingår i: Proceedings of the International Conference on Hardware - Software Codesign and System Synthesis. - New York, NY, USA : ACM. - 9781595938244 ; , s. 217-226
  • Konferensbidrag (refereegranskat)abstract
    • High-end biomedical applications are a good target for specific-purpose system-on-chip (SoC) implementations. Human heart electrocardiogram (ECG) real-time monitoring andanalysis is an immediate example with a large potential market. Today, the lack of scalable hardware platforms limits real-time analysis capabilities of most portable ECG analyzers, and prevents the upgrade of analysis algorithms for better accuracy. Multiprocessor system-on-chip (MPSoC) technology, which is becoming main-stream in the domain of high-performance microprocessors, is becoming attractive even for power-constrained portable applications, due to the capability to provide scalable computation horsepower at an affordable power cost. This paper illustrates one of the first comprehensive HW/SW exploration frameworks to fully exploit MPSoC technology to improve the quality of real-time ECG analysis.
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